In this position, you will work closely with design engineering to complete the layout and verification of high-performance mixed signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor’s Calibre tools, and work with circuit engineers to generate topological layouts to ensure optimal circuit performance.

Responsibilities

• Troubleshooting layout design issues and applying proactive intervention
• Work closely with design engineers to ensure proper circuit performance
• Design analog mix signal layout
• Understand device matching techniques
• Understand signal conditioning/protection techniques
• Excellent team work skills, including written and verbal communication
• Exceptional layout planning and integration skills

Required Skills and Qualifications

• Ability to layout analog circuitry in a size/time constrained environment
• Understand layout techniques such as common centroid, matching, isolation, shielding, and the use of dummy devices
• Ability to solve design problems while using a combination of technical skills, intuition, and creativity
• Proficiency in floor planning activities with block assembly, and block level routing
• LVS trouble shooting and debug skills.
• Demonstrated ability to work in a demanding team-oriented environment
• Team player and works well with others

Preferred Skills and Qualifications

• BS Degree in Electronic Engineering or related program
• Comfortable with multiple IC design CAD tools and foundry PDKs
• Demonstrated ability to contribute ideas for improved productivity and automation of layout tasks